ASIC Digital Design/Verification, Sr Staff

掲載中・今日に確認

給与: 記載なし
勤務地: 東京都
休日: 記載なし
雇用形態: 記載なし

オフィス出社

どんな仕事かAIによる生成

最新のSoC向けHBMコントローラIPのRTL設計・実装を担当します。仕様書をもとにマイクロアーキテクチャを設計し、設計・検証方針の決定やSystemVerilog/UVMを使用した検証計画・テストベンチ構築を行います。設計レビューのリード、グローバルチームとの連携、若手エンジニアの指導や進捗・検証レポートの作成も担当します。

応募資格・募集要項・仕事内容を見る

この求人に応募

給与記載なし

募集元で応募する日本シノプシス合同会社の採用ページへ

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応募資格

必須

RTL設計やマイクロアーキテクチャ設計の経験
UVM/VMM/OVMなどの検証手法やSystemVerilogの知識
SoC/ASIC設計フローや検証計画、カバレッジ重視の検証経験
シミュレーションツール、Unix環境、スクリプト言語（Perl, Python, TCL）
DDR、PCIE、AXI/CHI、SD/eMMC、Ethernet、USB、MIPIなどのプロトコル知識
英語でのコミュニケーション能力
BSEE（9年以上）またはMSEE（7年以上）の実務経験
Extensive hands-on experience with RTL design and micro-architecture development from functional specifications.
Proficiency in verification methodologies (UVM/VMM/OVM), SystemVerilog, and object-oriented verification techniques.
Deep understanding of SoC/ASIC design flows, verification planning, and coverage-driven verification.
Experience with simulation tools, Unix operating environments, and scripting languages (Perl, Python, TCL).
Solid knowledge of protocols such as DDR, PCIE, AMBA (AXI/CHI), SD/eMMC, Ethernet, USB, and MIPI.
Strong English communication skills and the ability to document and present technical concepts effectively.
BSEE with 9~10+ years or MSEE with 7~12+ years of relevant experience.

歓迎

Advantageous: Experience with formal verification, firmware/embedded software, C/C++, and functional safety standards (ISO26262, FMEDA).
フォーマル検証、ファームウェア・組込みソフト、C/C++、機能安全（ISO26262, FMEDA）経験

求める人物像

You are a passionate and technically adept engineer who thrives in a fast-paced, collaborative environment. With a strong background in digital design and verification, you possess an in-depth understanding of RTL-based IP core development, particularly for high-speed memory interfaces such as HBM. You are driven by curiosity and innovation, eager to tackle complex challenges in the semiconductor industry. Your experience enables you to make informed architectural decisions, and you are comfortable working autonomously while also excelling as a team player. You communicate clearly—both in English and within multicultural, cross-functional teams—and are always looking for opportunities to mentor, lead, and drive technical excellence.
You approach problems with creativity and rigor, breaking down large tasks into actionable plans. Your strong analytical mindset, combined with attention to detail, ensures that your designs and verification strategies are robust and scalable. You are excited about working on products that power AI, automotive, data centers, and next-generation computing platforms. You stay up-to-date with industry trends, tools, and methodologies, and are motivated by continuous learning and professional growth. Your proactive attitude, adaptability, and resilience make you a valued contributor and trusted colleague within any high-performance engineering team.
Innovative, self-motivated, and able to work independently with precision.
Exceptional problem-solving skills and keen attention to detail.
Effective communicator and active listener, adept at cross-functional collaboration.
Team-oriented and supportive, with a willingness to mentor and share knowledge.
Adaptable to new challenges, tools, and methodologies in a dynamic environment.
Committed to continuous learning and professional development.

募集要項最終確認 10/29

職種: ハードウェアエンジニア
雇用形態: Employee
役職: Sr Staff
給与: 記載なし
勤務地: Tokyo, Tokyo, Japan
働き方: Remote Eligible No
学歴: 大学卒業以上
掲載日: 2026/09/16 20:09（43日前）
最終確認: 2026/10/29 02:09（今日）

仕事内容

最新のSoC向けHBMコントローラIPのRTL設計・実装を担当します。
仕様書をもとに詳細なマイクロアーキテクチャを設計します。
設計や検証の判断や方針決定、検証計画の策定、テストベンチの構築（SystemVerilog/UVM使用）を行います。
設計レビューをリードし、グローバルチームと連携します。
若手エンジニアの指導や、進捗・検証レポートの作成も担当します。

期待される成果

高品質なHBMコントローラIPを提供し、AIや自動車、サーバーなど幅広い分野で活躍します。
製品の性能向上や統合リスクの低減に貢献し、技術力を高めます。
チーム全体の技術向上やベストプラクティスを推進します。

What You’ll Be Doing:

Designing and implementing RTL-based HBM controller IP cores for cutting-edge SoC applications.
Interpreting and translating standard and product functional specifications into detailed micro-architectures.
Making architectural and methodological judgments for both design and verification activities.
Developing comprehensive verification strategies, including testbench architectures using SystemVerilog and UVM.
Creating and maintaining verification plans, item lists, coverage metrics, and checker definitions to ensure thorough validation.
Coordinating and leading design review meetings to ensure alignment and technical excellence across global teams.
Providing technical leadership and mentoring to junior engineers, setting quality standards and driving innovation.
Documenting progress, generating reports with “visible” verification metrics, and ensuring project milestones are met.

The Impact You Will Have:

Delivering high-quality, robust HBM controller IP that accelerates time-to-market for Synopsys customers.
Enabling key innovations for AI, automotive, server, and data center applications through advanced memory interface solutions.
Reducing integration risk and enhancing system performance for a broad portfolio of end-customer products.
Driving technical excellence and best practices across global, cross-functional engineering teams.
Supporting Synopsys’ reputation as a leader in silicon IP by ensuring products meet and exceed industry standards.
Contributing to continuous improvement by identifying and implementing process, methodology, and tool enhancements.
Mentoring and developing the next generation of engineering talent within Synopsys.

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