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東京都のハードウェアエンジニアの求人110件応募資格・募集要項・仕事内容を見る
ASIC Digital Design Engineer
- 給与
- 記載なし
- 勤務地
- 東京都
- 休日
- In addition to company holidays, we have ETO and FTO Programs.
- 雇用形態
- 記載なし
どんな仕事かAIによる生成
Design and implement RTL for digital blocks and subsystems in complex protocol IP cores, and contribute to architecture and micro-architecture definitions. The role includes basic verification, RTL-level timing analysis, and collaboration on CDC/RDC/Lint signoff readiness and design-quality closure. The RTL and automation developed in this role contribute to the quality and time-to-market of Synopsys IP.
この求人に応募
応募資格
必須
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- 4~15+ years of experience in digital design and/or RTL development
- Hands-on experience designing and implementing synthesizable RTL in Verilog/SystemVerilog, with understanding of performance, area, power, and testability tradeoffs
- Experience with test planning, assertion development, basic verification, functional debug, and coverage closure
- Experience performing RTL-level timing analysis, with practical understanding of STA, timing constraints, and synthesis
- Experience with CDC/RDC/Lint signoff-ready design practices and design-quality closure
- Scripting experience in Python, Tcl, Perl, or Shell
- Written and oral communication skills in English and Japanese, with the ability to collaborate effectively across teams
歓迎
(Nice to Have)
- Direct experience with PCIe or CXL IP design and development
- Experience with low-power design and power intent development using UPF
- Exposure to UVM or formal verification concepts
- Exposure to functional safety concepts, ISO 26262, or FMEDA
- Experience mentoring engineers or serving as a technical lead on RTL/IP development projects
- Prior experience in a global product engineering environment
求める人物像
- You are a digital design engineer who takes pride in delivering RTL that is not only functionally correct, but also clean, synthesizable, and ready for real silicon.
- You enjoy working through the details—timing, CDC, lint, and design quality—because you know they matter when IP ships in customer products.
- You work well in a collaborative, global environment.
- You communicate openly with design, verification, and implementation teammates, ask thoughtful questions when specs are unclear, and are willing to learn new tools and methodologies, including AI-driven design approaches.
- Whether you are deepening your expertise or guiding others through complex challenges, you bring ownership, curiosity, and a practical mindset to your work.
- You take ownership of your work and follow through on issues until they are properly resolved
- You collaborate openly across teams and communicate clearly in both Japanese and English
- You stay curious and adapt quickly to new tools, flows, and technical challenges
- You balance attention to detail with practical judgment—you know when to dig deep and when to ask for help
- You share knowledge with teammates and contribute to a supportive, learning-oriented team culture
募集要項最終確認 10/25
- 職種
- ハードウェアエンジニア
- 雇用形態
- Employee
- 役職
- Staff -Sr Staff
- 給与
- 記載なし
- 勤務地
- Tokyo, Tokyo, Japan
- 働き方
- Remote Eligible No
- 休日・休暇
- In addition to company holidays, we have ETO and FTO Programs.
- 福利厚生
- We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.Comprehensive medical and healthcare plans that work for you and your family.In addition to company holidays, we have ETO and FTO Programs.Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.Save for your future with our retirement plans that vary by region and country.
- 経験年数
- 15年以上
- 学歴
- 大学卒業以上
- 選考の流れ
- When you apply to join us, your resume, skills, and experience are first reviewed for consideration.Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have.Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role.Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation.Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!
- 掲載日
- 2026/10/24 15:26（1日前）
- 最終確認
- 2026/10/25 02:09（今日）
仕事内容
What You'll Be Doing
- Understand industry standards and functional specifications, and contribute to architecture and micro-architecture definitions for complex protocol IP cores
- Design and implement RTL for digital blocks and subsystems in Verilog/SystemVerilog, balancing performance, area, power, synthesizability, and testability
- Perform basic verification and collaborate with verification teams on test planning, assertion development, functional debug, and coverage closure
- Perform RTL-level timing analysis during RTL development, and collaborate with implementation teams on STA, timing constraints, and synthesis as needed
- Support CDC/RDC/Lint signoff readiness and collaborate on design-quality closure
- Apply and explore AI-driven design tools and methodologies to improve design quality and automation
The Impact You Will Have
- Your RTL will directly influence the quality and time-to-market of Synopsys IP used by semiconductor companies worldwide
- You will reduce iteration cycles between front-end and back-end teams by delivering synthesis-ready, timing-aware designs
- Your collaboration will catch issues earlier, reducing costly respins and late-stage fixes
- The automation you build will improve design productivity for your team and beyond
- Your attention to CDC/RDC/Lint readiness will strengthen product quality and reduce signoff risk
The Team You'll Be Part Of
- Your recruiter will share more about the team structure and mission during the interview process.
この求人は、日本シノプシス合同会社の採用ページの内容をAIが読み取って整理したものです。応募の前に採用ページの原文を確かめてください。データの集め方企業サイト
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応募は日本シノプシス合同会社の採用ページで受け付けています。このページは採用ページの掲載内容をもとに構成しているため、最新の応募条件は募集元でご確認ください。
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