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東京都の生産技術の求人78件応募資格・募集要項・仕事内容を見る
Staff EMIB-T Substrate Yield Engineer
- 給与
- 記載なし
- 勤務地
- 東京都
- 休日
- 記載なし
- 雇用形態
- 記載なし
- ハイブリッド勤務
- 在宅勤務あり
どんな仕事かAIによる生成
Intel's APTM organization is seeking a Staff Technology Development Substrate Yield Engineer to drive supplier yield, defect reduction, technical issue closure, and process-control maturity supporting next-generation EMIB-T substrates across Japan suppliers. The role leads yield performance and structured investigations, establishes supplier actions and verification plans, and supports qualification, ramp readiness, change control, and deployment of dashboards or automated analytics.
この求人に応募
応募資格
必須
- Masters degree with 4+years or PhD with 2+years in Engineering, Materials Science, Physics, Chemistry, Data Science, or a related technical discipline.
- 4+ years of experience in semiconductor manufacturing, advanced packaging, substrate technology, yield engineering, process engineering, or a closely related field.
- Hands-on experience in substrate, advanced packaging, or semiconductor yield engineering, including statistical analysis, defect reduction, process optimization, SPC, DFM/DFY, defect metrology, failure analysis, and HVM execution.
- Strong analytical and problem-solving skills with the ability to make data-driven decisions in complex environments.
- Experience working across multiple organizations and influencing stakeholders to achieve results.
- Demonstrated ability to independently manage complex technical issues, execute with urgency, and drive actions to closure.
- Experience developing or deploying yield monitoring systems, automated analytics, dashboards, image analytics, computer vision, AI/ML-based defect detection, or automated defect classification systems.
- Professional proficiency in Japanese and English sufficient for technical work, subject to HR validation.
歓迎
- Experience working directly with substrate suppliers and external manufacturing partners.
- Demonstrated program leadership experience, including coordinating cross-functional technical teams and driving execution in high-visibility, high-impact environments.
- Experience with semi-additive processing, build-up films, microvias, copper plating, lithography, lamination, embedded silicon, TSV, 2.5D/3D packaging, or heterogeneous integration.
- Prior experience supporting technology development, qualification, and manufacturing ramp of advanced semiconductor technologies.
- Experience with automated data pipelines, dashboards, image analytics, computer vision, AI/ML defect detection, or automated defect classification.
募集要項最終確認 11/13
- 職種
- 生産技術
- 雇用形態
- 記載なし
- 役職
- Staff
- 給与
- 記載なし
- 勤務地
- 東京都Tokyo
- 働き方
- This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
- 経験年数
- 4年以上
- 学歴
- 大学院修了以上
- 掲載日
- 2026/11/13 17:39（1日前）
- 最終確認
- 2026/11/13 17:39（1日前）
仕事内容
Job Description
- Intel's APTM organization is seeking a highly driven Staff Technology Development Substrate Yield Engineer to drive supplier yield, defect reduction, technical issue closure, and process-control maturity supporting next-generation EMIB-T substrates across Japan suppliers. The team will be chartered to lead yield performance for next-generation advanced packaging technologies, including EMIB-T (Embedded Multi-die Interconnect Bridge with TSV), Intel's most advanced platform for heterogeneous integration partnering with substrate suppliers locally at the HVM factories. This is a high-visibility, high-accountability role with significant responsibility for enabling successful technology development and manufacturing readiness across both Intel Foundry Services (IFS) and Intel Product Groups (IPG). The ideal candidate is a self-starter who thrives in ambiguous and fast-paced environments, proactively drives issues to closure, and requires minimal supervision. Success in this role requires strong technical depth, urgency in execution, the ability to influence cross-functional teams and suppliers, and a relentless focus on delivering yield and program milestones. Key responsibilities Own day-to-day yield performance and issue closure for assigned supplier lines, modules, products, or process areas. Lead structured investigations from containment and hypothesis development through experiments, failure analysis, corrective action, and sustainment. Use statistical and spatial analytics to identify signatures by line, tool, material, panel position, geometry, product, and time. Establish clear supplier actions, owners, completion criteria, control limits, and verification plans. Support DFM/DFY, qualification, ramp readiness, change control, and deployment of dashboards or automated analytics. Capture reusable learning and communicate facts, hypotheses, decisions, and residual risks clearly.
この求人は、インテル株式会社の採用ページの内容をAIが読み取って整理したものです。応募の前に採用ページの原文を確かめてください。データの集め方企業サイト
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