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東京都のハードウェアエンジニアの求人110件応募資格・募集要項・仕事内容を見る
Memory Layout Technical Lead
- 給与
- 記載なし
- 勤務地
- 東京都小平市
- 休日
- 記載なし
- 雇用形態
- 正社員
- オフィス出社
どんな仕事かAIによる生成
This position leads the memory layout design team and is responsible for layout design of embedded NVM IP for future MCUs. The work includes developing layout strategies, leading hands-on layout design and verification, and contributing to MCU PPA optimization. The role collaborates with global NVM development teams in Japan and overseas.
この求人に応募
応募資格
必須
- Experience in full-custom layout design for non-volatile memory (typically 10+ years)
- Experience in building consensus with circuit designers and leading layout design reviews (typically 5+ years)
- Experience collaborating with overseas partners in English
歓迎
- Experience in P&R design
- Experience in analog circuit design
- Experience in AI-assisted layout design
募集要項最終確認 10/27
- 職種
- ハードウェアエンジニア
- 雇用形態
- Full-time
- 役職
- Serve as the technical lead for the memory layout design team
- 給与
- 記載なし
- 勤務地
- 東京都小平市
- 働き方
- リモート No
- 経験年数
- 5年以上
- 掲載日
- 2026/10/16 20:51（11日前）
- 最終確認
- 2026/10/27 02:51（今日）
仕事内容
Technical Domain
- Layout design for non-volatile memory (NVM) IP, including Flash, MRAM, and ReRAM
Target Products
- MCUs for automotive, industrial, and IoT applications
Project Overview
- Layout design for NVM IP based on memory cells developed by in-house fabs and foundry partners
- Contribute to PPA (Performance, Power, and Area) optimization of MCU products
- Collaborate with global NVM development teams in Japan and overseas
Responsibilities
- Serve as the technical lead for the memory layout design team
- Develop layout strategies based on IP requirements and circuit specifications
- Lead hands-on layout design and verification activities
募集内容
- Renesas is expanding its investment in next-generation embedded NVM technologies and IP development to further strengthen the competitiveness of its MCUs for automotive, industrial, and IoT applications. As embedded NVM IP—including Flash and emerging memory technologies such as MRAM and ReRAM—is a key differentiator for MCUs, demand continues to grow for higher performance, greater capacity, and enhanced reliability.
募集内容
- This position is responsible for the layout design of embedded NVM IP for future MCUs. You will have the opportunity to develop a core technology that supports a world-leading MCU business shipping tens to hundreds of millions of units, enabling you to make a significant business impact. Renesas’ embedded NVM IP development organization also actively and continuously submits and presents papers at premier international semiconductor conferences, including ISSCC, the Symposium on VLSI Circuits, and IEDM. Working alongside highly skilled development engineers, you will be able to further deepen your expertise while gaining experience and broader skills across memory technologies.
この求人は、ルネサスエレクトロニクス株式会社の採用ページの内容をAIが読み取って整理したものです。応募の前に採用ページの原文を確かめてください。データの集め方企業サイト
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応募はルネサスエレクトロニクス株式会社の採用ページで受け付けています。このページは採用ページの掲載内容をもとに構成しているため、最新の応募条件は募集元でご確認ください。
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