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NAND Designer / Layout
- 給与
- 記載なし
- 勤務地
- 記載なし
- 休日
- 記載なし
- 雇用形態
- 記載なし
どんな仕事かAIによる生成
Develops and validates custom test circuit architectures for NAND flash memory designs, working across circuit design, simulation, testability, layout collaboration, and silicon debug. The role also develops test sequences, supports first-silicon bring-up and production ramp, and applies AI-assisted workflows and automation to improve design quality and engineering productivity.
この求人に応募
応募資格
必須
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field with 2+ years of experience
- Relevant hands-on experience in custom/analog circuit design, mixed-signal design, memory peripheral circuit design, or Product Engineering with strong transistor-level circuit and silicon-debug exposure.
- Strong understanding of CMOS device operation, transistor-level circuit design, leakage mechanisms, parasitics, PVT sensitivity, timing, loading, noise margin, power, and reliability principles.
- Hands-on proficiency with circuit build entry, waveform debug and post-layout verification.
- Proficiency in XA or equivalent fast transistor-level simulation, Verilog, and mixed-signal validation methodologies.
- Proficiency in Python and scripting for simulation automation, regression analysis, result extraction, waveform processing, and engineering efficiency.
- Ability to identify workflows that can be improved through AI, develop or adapt AI-enabled engineering solutions, and apply appropriate technical review, data protection, and engineering judgment.
- Excellent problem-solving skills, strong attention to detail, and effective interpersonal skills for multi-functional, global collaboration.
歓迎
- Preferred (not must) solid understanding of NAND flash memory architecture, test modes, peripheral circuits, internal signal access, and wafer/package test considerations.
- Nice to have: Laboratory skills using oscilloscope, logic or signal analyzer, source-measure equipment, function generator, and hands-on testing of silicon at wafer and package levels.
募集要項最終確認 10/28
- 職種
- ハードウェアエンジニア
- 雇用形態
- 記載なし
- 給与
- 記載なし
- 勤務地
- 記載なし
- 働き方
- 記載なし
- 経験年数
- 2年以上
- 学歴
- 大学卒業以上
- 掲載日
- 2026/10/28 22:17（1日前）
- 最終確認
- 2026/10/28 22:16（1日前）
仕事内容
募集内容
- Develop, integrate, and optimize custom test circuit architectures for NAND flash memory designs, including transistor-level digital, analog, mixed-signal, monitoring, control, and memory-array interface circuits. Interpret product specifications and test requirements; define circuit functionality, interfaces, operating limits, controllability, observability, and validation criteria. Create, review, and optimize schematics, device sizing, bias structures, sensing and monitoring paths, multiplexers relevant to test circuits. Analyze circuit testability and robustness to ensure compliance with quality, coverage, manufacturability, power, area, and reliability requirements. Validate custom test circuits using XA simulations, Verilog simulations, and mixed-signal validation environments. Collaborate closely with layout teams on matching, parasitic sensitivity, shielding, routing, guard rings, device placement, and layout-dependent effects; review post-layout results and drive closure. Evaluate circuit risks including leakage, contention, floating nodes, device overstress, power sequencing, current density, EM/IR, and long-duration stress conditions. Create and debug test sequences and test modes required to control, observe, characterize, and validate custom test circuits at wafer and package levels. Work with Product Engineering during first-silicon bring-up, debug and characterization, failure isolation, simulation-to-silicon correlation, and ramp to high-volume production. Use laboratory measurements and silicon data to identify root cause and recommend circuit, test-mode, characterization, or screening improvements. Apply a Design + AI approach as a core responsibility by using AI-assisted and agentic engineering workflows to accelerate circuit review, simulation triage, waveform analysis, root-cause investigation, automation, documentation, and knowledge retrieval while maintaining engineering rigor and sign-off discipline. Develop Python or scripting-based automation and AI-enabled solutions that improve design quality, reduce turnaround time, and increase engineering productivity. Document test-circuit methodologies, specifications, design decisions, validation results, silicon correlation, and clear technical recommendations.
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